// SPDX-License-Identifier: GPL-2.0
/*
 * imx291 driver
 *
 */

#include <linux/clk.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/version.h>
#include <linux/rk-camera-module.h>
#include <media/media-entity.h>
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-subdev.h>
#include <linux/pinctrl/consumer.h>
#include <linux/rk-preisp.h>
#include "../platform/rockchip/isp/rkisp_tb_helper.h"

#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x01)

#define OF_CAMERA_HDR_MODE		"rockchip,camera-hdr-mode"

//#define MIPI_FREQ			334125000
#define MIPI_FREQ			222750000
//#define MIPI_FREQ			111370000

/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
#define PIXEL_RATE_WITH_270M            (MIPI_FREQ * 2LL * 4LL / 12LL)

#define IMX291_XVCLK_FREQ		37125000

#define REG_NULL			0xFFFF
#define REG_DELAY			0xFFFE

#define IMX291_REG_VALUE_08BIT		1
#define IMX291_REG_VALUE_16BIT		2
#define IMX291_REG_VALUE_24BIT		3

#define IMX291_LANES			4

#define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
#define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"

#define	IMX291_EXPOSURE_MIN		2
#define	IMX291_EXPOSURE_STEP		1
#define IMX291_VTS_MAX			0xffff

#define IMX291_GAIN_MIN		0x10
#define IMX291_GAIN_MAX		0xF7C
#define IMX291_GAIN_STEP		1
#define IMX291_GAIN_DEFAULT		0x10

#define IMX291_NAME			"imx291"

static const char * const imx291_supply_names[] = {
	"avdd",		/* Analog power */
	"dovdd",	/* Digital I/O power */
	"dvdd",		/* Digital core power */
};

#define IMX291_NUM_SUPPLIES ARRAY_SIZE(imx291_supply_names)

struct regval {
	u16 addr;
	u8 val;
};

struct imx291_mode {
	u32 bus_fmt;
	u32 width;
	u32 height;
	struct v4l2_fract max_fps;
	u32 hts_def;
	u32 vts_def;
	u32 exp_def;
	const struct regval *reg_list;
	u32 hdr_mode;
};

struct imx291 {
	struct i2c_client	*client;
	struct clk		*xvclk;
	struct gpio_desc	*reset_gpio;
	struct regulator_bulk_data supplies[IMX291_NUM_SUPPLIES];

	struct pinctrl		*pinctrl;
	struct pinctrl_state	*pins_default;
	struct pinctrl_state	*pins_sleep;

	struct v4l2_subdev	subdev;
	struct media_pad	pad;
	struct v4l2_ctrl_handler ctrl_handler;
	struct v4l2_ctrl	*exposure;
	struct v4l2_ctrl	*anal_gain;
	struct v4l2_ctrl	*digi_gain;
	struct v4l2_ctrl	*hblank;
	struct v4l2_ctrl	*vblank;
	struct v4l2_ctrl	*test_pattern;
	struct v4l2_ctrl	*pixel_rate;
	struct v4l2_ctrl	*link_freq;
	struct v4l2_ctrl	*h_flip;
	struct v4l2_ctrl	*v_flip;
	struct mutex		mutex;
	bool			streaming;
	bool			power_on;
	const struct imx291_mode *cur_mode;
	u32			cfg_num;
	u32			module_index;
	const char		*module_facing;
	const char		*module_name;
	const char		*len_name;
	bool			is_thunderboot;
	bool			is_thunderboot_ng;
	u8			flip;
};

#define to_imx291(sd) container_of(sd, struct imx291, subdev)
#if 0
static const struct regval imx291_1920x1080_30fps_regs[] = {
	/* imx290 1080p30 */
	{0x200, 0x01}, /* standby */

	{REG_NULL, 200}, /* delay 200*/

	{0x207, 0x00},
    	{0x209, 0x02},
    	{0x20A, 0xF0},
    	{0x20F, 0x00},
    	{0x210, 0x21},
    	{0x212, 0x64},
    	{0x214, 0x20},//Gain
    	{0x216, 0x09},
    	{0x216, 0x09},

    	{0x218, 0x6D}, /* VMAX[7:0] */
    	{0x219, 0x04}, /* VMAX[15:8] */
    	{0x21a, 0x00}, /* VMAX[16] */
    	{0x21b, 0x00},
    	{0x21c, 0x30}, /* HMAX[7:0] */
    	{0x21c, 0x11}, /* HMAX[15:8] */


    	{0x220, 0x01},//SHS1
    	{0x221, 0x00},

    	{0x246, 0xE1},//LANE CHN
    	{0x25C, 0x18},
    	{0x25E, 0x20},

    	{0x270, 0x02},
    	{0x271, 0x11},
    	{0x29B, 0x10},
    	{0x29C, 0x22},
    	{0x2A2, 0x02},
    	{0x2A6, 0x20},
    	{0x2A8, 0x20},
    	{0x2AA, 0x20},
    	{0x2AC, 0x20},
    	{0x2B0, 0x43},

    	{0x319, 0x9E},
    	{0x31C, 0x1E},
    	{0x31E, 0x08},
    	{0x328, 0x05},
    	{0x33D, 0x83},
    	{0x350, 0x03},

    	{0x35E, 0x1A},// 1A:37.125MHz 1B:74.25MHz
    	{0x364, 0x1A},// 1A:37.125MHz 1B:74.25MHz

    	{0x37C, 0x00},
    	{0x37E, 0x00},

    	{0x37E, 0x00},

    	{0x4B8, 0x50},
    	{0x4B9, 0x10},
    	{0x4BA, 0x00},
    	{0x4BB, 0x04},
    	{0x4C8, 0x50},
    	{0x4C9, 0x10},
    	{0x4CA, 0x00},
    	{0x4CB, 0x04},

    	{0x52C, 0xD3},
    	{0x52D, 0x10},
    	{0x52E, 0x0D},
    	{0x558, 0x06},
    	{0x559, 0xE1},
    	{0x55A, 0x11},
    	{0x560, 0x1E},
    	{0x561, 0x61},
    	{0x562, 0x10},
    	{0x5B0, 0x50},
    	{0x5B2, 0x1A},
    	{0x5B3, 0x04},

	{REG_NULL, 200},

	{0x200, 0x00}, /* standby */
    	{0x202, 0x00}, /* master mode start */
    	{0x249, 0x0A}, /* XVSOUTSEL XHSOUTSEL */

	{REG_NULL, 0},

};
#endif
#if 0
static const struct regval imx291_1920x1080_30fps_regs[] = {
	{0x3000, 0x01}, /* standby */
    	{0x3002, 0x01}, /* XTMSTA */

    	{0x3005, 0x01}, //ADBIT
    	{0x3129, 0x00}, //ADBIT1
    	{0x317c, 0x00}, //ADBIT2
    	{0x31ec, 0x0e}, //ADBIT3
    	{0x3441, 0x0c}, //CSI_DT_FMT
    	{0x3442, 0x0c}, //CSI_DT_FMT

    	{0x3007, 0x00},
    	{0x300c, 0x00},
    	{0x300f, 0x00},
    	{0x3010, 0x21},
    	{0x3012, 0x64},
    	{0x3016, 0x09},
    	{0x3017, 0x00},

    	{0x3020, 0x01}, /* SHS1 */
    	{0x3021, 0x00},
    	{0x3024, 0x00}, /* SHS2 */
    	{0x3025, 0x00},
    	{0x3028, 0x00}, /* SHS3 */
    	{0x3029, 0x00},
    	{0x3030, 0x00}, /* RHS1 */
    	{0x3031, 0x00},
    	{0x3034, 0x00}, /* RHS2 */
    	{0x3035, 0x00},

    	{0x305c, 0x18},
    	{0x305d, 0x03},
    	{0x305e, 0x20},
    	{0x305f, 0x01},
    	{0x3070, 0x02},
    	{0x3071, 0x11},
    	{0x309b, 0x10},
    	{0x309c, 0x22},
    	{0x30a2, 0x02},
    	{0x30a6, 0x20},
    	{0x30a8, 0x20},
    	{0x30aa, 0x20},
    	{0x30ac, 0x20},

    	{0x30b0, 0x43},
    	{0x3119, 0x9e},
    	{0x311c, 0x1e},
    	{0x311e, 0x08},
    	{0x3128, 0x05},
    	{0x313d, 0x83},
    	{0x3150, 0x03},

    	{0x317e, 0x00},
    	{0x315e, 0x1a},
    	{0x3164, 0x1a},
    	{0x32b8, 0x50},

    	{0x32b9, 0x10},
    	{0x32ba, 0x00},
    	{0x32bb, 0x04},
    	{0x32c8, 0x50},
    	{0x32c9, 0x10},
    	{0x32ca, 0x00},
    	{0x32cb, 0x04},
    	{0x332c, 0xd3},
    	{0x332d, 0x10},
    	{0x332e, 0x0d},
    	{0x3358, 0x06},
    	{0x3359, 0xe1},
    	{0x335a, 0x11},
    	{0x3360, 0x1e},

    	{0x3361, 0x61},
    	{0x3362, 0x10},
    	{0x33b0, 0x50},
    	{0x33b2, 0x1a},
    	{0x33b3, 0x04},
    	{0x3414, 0x0a},
    	{0x3418, 0x49},
    	{0x3419, 0x04},
    	{0x3444, 0x20},
    	{0x3445, 0x25},

    	{0x3446, 0x47},
    	{0x3447, 0x00}, 
    	{0x3448, 0x1f},
    	{0x3449, 0x00},
    	{0x344a, 0x17},
    	{0x344b, 0x00},
    	{0x344c, 0x0f},
    	{0x344d, 0x00},
    	{0x344e, 0x17},
    	{0x344f, 0x00},
    	{0x3450, 0x47},
    	{0x3451, 0x00},
    	{0x3452, 0x0f},
    	{0x3453, 0x00},
    	{0x3454, 0x0f},
    	{0x3455, 0x00},
    	{0x3480, 0x49},

    	{0x3000, 0x00}, /* standby */

	{REG_DELAY, 20},
    	{0x3002, 0x00}, /* master mode start */
    	{0x304b, 0x0a}, /* XVSOUTSEL XHSOUTSEL */
};
#else
static const struct regval imx291_1920x1080_30fps_regs[] = {
	/* imx290 1080p30 */
	//{0x3003, 0x01}, /* software reset - ldl 2021-3-10 */

	{0x3000, 0x01}, /* standby */
	{REG_DELAY, 200},
	{0x3002, 0x01}, /* operation stop - ldl 2021-3-10 */
	{0x3007, 0x00}, 
    	{0x3009, 0x02},
    	{0x300A, 0xF0}, /* black level offset */
    	{0x300F, 0x00},
    	{0x3010, 0x21},
    	{0x3012, 0x64},
    	{0x3014, 0x20},//Gain
    	{0x3016, 0x09},
    	{0x3016, 0x09},

	//0x0465 --> 1125
    	{0x3018, 0x65}, /* VMAX[7:0] */
    	{0x3019, 0x04}, /* VMAX[15:8] */
	//0x1130 --> 4400
    	{0x301c, 0x30}, /* HMAX[7:0] */
    	{0x301d, 0x11}, /* HMAX[15:8] */


    	{0x3020, 0x01},//SHS1
    	{0x3021, 0x00},

    	{0x3046, 0x01},//LANE CHN
    	{0x304B, 0x0A}, /* XVSOUTSEL XHSOUTSEL */

    	{0x305C, 0x18},
    	{0x305D, 0x03},
    	{0x305E, 0x20},
    	{0x305F, 0x01},

    	{0x3070, 0x02},
    	{0x3071, 0x11},
    	{0x309B, 0x10},
    	{0x309C, 0x22},
    	{0x30A2, 0x02},
    	{0x30A6, 0x20},
    	{0x30A8, 0x20},
    	{0x30AA, 0x20},
    	{0x30AC, 0x20},
    	{0x30B0, 0x43},

    	{0x3119, 0x9E},
    	{0x311C, 0x1E},
    	{0x311E, 0x08},
    	{0x3128, 0x05},
    	{0x313D, 0x83},
    	{0x3150, 0x03},

    	{0x315E, 0x1A},// 1A:37.125MHz 1B:74.25MHz
    	{0x3164, 0x1A},// 1A:37.125MHz 1B:74.25MHz

    	{0x317C, 0x00},//AD bit2 12bit
    	{0x317E, 0x00},
    	{0x31EC, 0x0e},//AD bit3 12bit

    	{0x32B8, 0x50},
    	{0x32B9, 0x10},
    	{0x32BA, 0x00},
    	{0x32BB, 0x04},
    	{0x32C8, 0x50},
    	{0x32C9, 0x10},
    	{0x32CA, 0x00},
    	{0x32CB, 0x04},

    	{0x332C, 0xD3},
    	{0x332D, 0x10},
    	{0x332E, 0x0D},
    	{0x3358, 0x06},
    	{0x3359, 0xE1},
    	{0x335A, 0x11},
    	{0x3360, 0x1E},
    	{0x3361, 0x61},
    	{0x3362, 0x10},
    	{0x33B0, 0x50},
    	{0x33B2, 0x1A},
    	{0x33B3, 0x04},

	// y -> 1097
	//{0x3418, 0x49},
	//{0x3419, 0x04},
	// y -> 1080
	{0x3418, 0x38},
	{0x3419, 0x04},

	{0x3444, 0x20},
	{0x3445, 0x25}, // EXTCK_FREQ = 37.125Mhz

	//x -> 1948
	//{0x3472, 0x9c},
	//{0x3473, 0x07},
	//x -> 1920
	{0x3472, 0x80},
	{0x3473, 0x07},

	{0x3480, 0x49}, // INCKSEL7 = 37.125Mhz

    	{0x3002, 0x00}, /* master mode start */

	{0x3000, 0x00}, /* standby */
	{REG_NULL, 0},

};
#endif
/*
 * The width and height must be configured to be
 * the same as the current output resolution of the sensor.
 * The input width of the isp needs to be 16 aligned.
 * The input height of the isp needs to be 8 aligned.
 * If the width or height does not meet the alignment rules,
 * you can configure the cropping parameters with the following function to
 * crop out the appropriate resolution.
 * struct v4l2_subdev_pad_ops {
 *	.get_selection
 * }
 */
static const struct imx291_mode supported_modes[] = {
	{
		.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
		//.bus_fmt = MEDIA_BUS_FMT_SBGGR12_1X12,
		//.bus_fmt = MEDIA_BUS_FMT_SGBRG12_1X12,
		//.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
		//.bus_fmt = MEDIA_BUS_FMT_SRGGB12_1X12,
		.width = 1920,
		.height = 1080,
		//.width = 1948,
		//.height = 1097,
		.max_fps = {
			.numerator = 10000,
			.denominator = 250000,
		},
		.reg_list = imx291_1920x1080_30fps_regs,
		.exp_def = 0x11c,
		.hts_def = 0x1130, 
		.vts_def = 0x465,
		.hdr_mode = NO_HDR,
	},
};

static const s64 link_freq_menu_items[] = {
	MIPI_FREQ,
};

static const char * const imx291_test_pattern_menu[] = {
	"Disabled",
	"Vertical Color Bar Type 1",
	"Vertical Color Bar Type 2",
	"Vertical Color Bar Type 3",
	"Vertical Color Bar Type 4"
};

static int __imx291_power_on(struct imx291 *imx291);

/* Write registers up to 4 at a time */
static int imx291_write_reg(struct i2c_client *client, u16 reg,
			    u32 len, u32 val)
{
	u32 buf_i, val_i;
	u8 buf[6];
	u8 *val_p;
	__be32 val_be;

	if (len > 4)
		return -EINVAL;

	buf[0] = reg >> 8;
	buf[1] = reg & 0xff;

	val_be = cpu_to_be32(val);
	val_p = (u8 *)&val_be;
	buf_i = 2;
	val_i = 4 - len;

	while (val_i < 4)
		buf[buf_i++] = val_p[val_i++];

	if (i2c_master_send(client, buf, len + 2) != len + 2)
		return -EIO;

	return 0;
}

static int imx291_write_array(struct i2c_client *client,
			       const struct regval *regs)
{
	u32 i;
	int ret = 0;

	printk(KERN_CRIT "%s\n", __func__);
	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
		if (regs[i].addr == REG_DELAY) {
			mdelay(regs[i].val);
		} else { 	
			ret |= imx291_write_reg(client, regs[i].addr,
					IMX291_REG_VALUE_08BIT, regs[i].val);
		}
	}
	//imx291_write_reg(client, 0x200,IMX291_REG_VALUE_08BIT,0x01);
	return ret;
}

static int imx291_get_reso_dist(const struct imx291_mode *mode,
				struct v4l2_mbus_framefmt *framefmt)
{
	return abs(mode->width - framefmt->width) +
	       abs(mode->height - framefmt->height);
}

static const struct imx291_mode *
imx291_find_best_fit(struct imx291 *imx291, struct v4l2_subdev_format *fmt)
{
	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
	int dist;
	int cur_best_fit = 0;
	int cur_best_fit_dist = -1;
	unsigned int i;

	for (i = 0; i < imx291->cfg_num; i++) {
		dist = imx291_get_reso_dist(&supported_modes[i], framefmt);
		if ((cur_best_fit_dist == -1 || dist <= cur_best_fit_dist) &&
			(supported_modes[i].bus_fmt == framefmt->code)) {
			cur_best_fit_dist = dist;
			cur_best_fit = i;
		}
	}

	return &supported_modes[cur_best_fit];
}

static int imx291_set_fmt(struct v4l2_subdev *sd,
			  struct v4l2_subdev_pad_config *cfg,
			  struct v4l2_subdev_format *fmt)
{
	struct imx291 *imx291 = to_imx291(sd);
	const struct imx291_mode *mode;

	mutex_lock(&imx291->mutex);

	mode = imx291_find_best_fit(imx291, fmt);
	fmt->format.code = mode->bus_fmt;
	fmt->format.width = mode->width;
	fmt->format.height = mode->height;
	fmt->format.field = V4L2_FIELD_NONE;
	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
#else
		mutex_unlock(&imx291->mutex);
		return -ENOTTY;
#endif
	} else {
		imx291->cur_mode = mode;
	}

	mutex_unlock(&imx291->mutex);

	return 0;
}

static int imx291_get_fmt(struct v4l2_subdev *sd,
			  struct v4l2_subdev_pad_config *cfg,
			  struct v4l2_subdev_format *fmt)
{
	struct imx291 *imx291 = to_imx291(sd);
	const struct imx291_mode *mode = imx291->cur_mode;

	mutex_lock(&imx291->mutex);
	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
		fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
#else
		mutex_unlock(&imx291->mutex);
		return -ENOTTY;
#endif
	} else {
		fmt->format.width = mode->width;
		fmt->format.height = mode->height;
		fmt->format.code = mode->bus_fmt;
		fmt->format.field = V4L2_FIELD_NONE;
	}
	mutex_unlock(&imx291->mutex);

	return 0;
}

static int imx291_enum_mbus_code(struct v4l2_subdev *sd,
				 struct v4l2_subdev_pad_config *cfg,
				 struct v4l2_subdev_mbus_code_enum *code)
{
	struct imx291 *imx291 = to_imx291(sd);

	if (code->index != 0)
		return -EINVAL;
	code->code = imx291->cur_mode->bus_fmt;

	return 0;
}

static int imx291_enum_frame_sizes(struct v4l2_subdev *sd,
				   struct v4l2_subdev_pad_config *cfg,
				   struct v4l2_subdev_frame_size_enum *fse)
{
	struct imx291 *imx291 = to_imx291(sd);

	if (fse->index >= imx291->cfg_num)
		return -EINVAL;

	if (fse->code != supported_modes[fse->index].bus_fmt)
		return -EINVAL;

	fse->min_width  = supported_modes[fse->index].width;
	fse->max_width  = supported_modes[fse->index].width;
	fse->max_height = supported_modes[fse->index].height;
	fse->min_height = supported_modes[fse->index].height;

	return 0;
}

static int imx291_g_frame_interval(struct v4l2_subdev *sd,
				   struct v4l2_subdev_frame_interval *fi)
{
	struct imx291 *imx291 = to_imx291(sd);
	const struct imx291_mode *mode = imx291->cur_mode;

	mutex_lock(&imx291->mutex);
	fi->interval = mode->max_fps;
	mutex_unlock(&imx291->mutex);

	return 0;
}

static int imx291_g_mbus_config(struct v4l2_subdev *sd,
				struct v4l2_mbus_config *config)
{
	struct imx291 *imx291 = to_imx291(sd);
	const struct imx291_mode *mode = imx291->cur_mode;
	u32 val = 0;

	if (mode->hdr_mode == NO_HDR)
		val = 1 << (IMX291_LANES - 1) |
		V4L2_MBUS_CSI2_CHANNEL_0 |
		V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
	if (mode->hdr_mode == HDR_X2)
		val = 1 << (IMX291_LANES - 1) |
		V4L2_MBUS_CSI2_CHANNEL_0 |
		V4L2_MBUS_CSI2_CONTINUOUS_CLOCK |
		V4L2_MBUS_CSI2_CHANNEL_1;

	config->type = V4L2_MBUS_CSI2;
	config->flags = val;

	return 0;
}

static void imx291_get_module_inf(struct imx291 *imx291,
				  struct rkmodule_inf *inf)
{
	memset(inf, 0, sizeof(*inf));
	strlcpy(inf->base.sensor, IMX291_NAME, sizeof(inf->base.sensor));
	strlcpy(inf->base.module, imx291->module_name,
		sizeof(inf->base.module));
	strlcpy(inf->base.lens, imx291->len_name, sizeof(inf->base.lens));
}

static long imx291_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
	struct imx291 *imx291 = to_imx291(sd);
	struct rkmodule_hdr_cfg * hdr_cfg = NULL;
	long ret = 0;

	printk(KERN_CRIT "%s\n", __func__);
	switch (cmd) {
	case RKMODULE_SET_HDR_CFG:
		break;
	case RKMODULE_GET_MODULE_INFO:
		imx291_get_module_inf(imx291, (struct rkmodule_inf *)arg);
		break;
	case RKMODULE_GET_HDR_CFG:
		hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
		hdr_cfg->esp.mode = HDR_NORMAL_VC;
		hdr_cfg->hdr_mode = imx291->cur_mode->hdr_mode;
		break;
	case RKMODULE_SET_CONVERSION_GAIN:
		break;
	case RKMODULE_SET_QUICK_STREAM:
		break;
	default:
		ret = -ENOIOCTLCMD;
		break;
	}

	return ret;
}

#ifdef CONFIG_COMPAT
static long imx291_compat_ioctl32(struct v4l2_subdev *sd,
				  unsigned int cmd, unsigned long arg)
{
	void __user *up = compat_ptr(arg);
	struct rkmodule_inf *inf;
	struct rkmodule_awb_cfg *cfg;
	struct rkmodule_hdr_cfg *hdr;
	struct preisp_hdrae_exp_s *hdrae;
	long ret;
	u32 cg = 0;
	u32 stream = 0;

	printk(KERN_CRIT "%s\n", __func__);
	switch (cmd) {
	case RKMODULE_GET_MODULE_INFO:
		inf = kzalloc(sizeof(*inf), GFP_KERNEL);
		if (!inf) {
			ret = -ENOMEM;
			return ret;
		}

		ret = imx291_ioctl(sd, cmd, inf);
		if (!ret)
			ret = copy_to_user(up, inf, sizeof(*inf));
		kfree(inf);
		break;
	case RKMODULE_AWB_CFG:
		break;
	case RKMODULE_GET_HDR_CFG:
		break;
	case RKMODULE_SET_HDR_CFG:
		break;
	case PREISP_CMD_SET_HDRAE_EXP:
		break;
	case RKMODULE_SET_CONVERSION_GAIN:
		break;
	case RKMODULE_SET_QUICK_STREAM:
		break;
	default:
		ret = -ENOIOCTLCMD;
		break;
	}

	return ret;
}
#endif

static int __imx291_start_stream(struct imx291 *imx291)
{
	int ret;

	printk(KERN_CRIT "%s\n", __func__);

	if (!imx291->is_thunderboot) {
		ret = imx291_write_array(imx291->client, imx291->cur_mode->reg_list);
		if (ret)
			return ret;
	}
	return 0;
}

static int __imx291_stop_stream(struct imx291 *imx291)
{
	printk(KERN_CRIT "%s\n", __func__);
	return 0;
}

static int imx291_s_stream(struct v4l2_subdev *sd, int on)
{
	struct imx291 *imx291 = to_imx291(sd);
	struct i2c_client *client = imx291->client;
	int ret = 0;

	printk(KERN_CRIT "%s start\n", __func__);
	mutex_lock(&imx291->mutex);
	printk(KERN_CRIT "%s on = %d, imx291->streaming = %d\n", __func__, on, imx291->streaming);
	on = !!on;
	if (on == imx291->streaming)
		goto unlock_and_return;

	imx291->streaming = on;

	if (on) {
		if (imx291->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
			imx291->is_thunderboot = false;
			__imx291_power_on(imx291);
		}
		ret = pm_runtime_get_sync(&client->dev);
		if (ret < 0) {
			pm_runtime_put_noidle(&client->dev);
			goto unlock_and_return;
		}
		ret = __imx291_start_stream(imx291);
		if (ret) {
			v4l2_err(sd, "start stream failed while write regs\n");
		//	pm_runtime_put(&client->dev);
			goto unlock_and_return;
		}
	} else {
		__imx291_stop_stream(imx291);
		pm_runtime_put(&client->dev);
	}

unlock_and_return:
	mutex_unlock(&imx291->mutex);

	return ret;
}

static int imx291_s_power(struct v4l2_subdev *sd, int on)
{
	struct imx291 *imx291 = to_imx291(sd);
	struct i2c_client *client = imx291->client;
	int ret = 0;

	mutex_lock(&imx291->mutex);

	/* If the power state is not modified - no work to do. */
	if (imx291->power_on == !!on)
		goto unlock_and_return;

	if (on) {
		ret = pm_runtime_get_sync(&client->dev);
		if (ret < 0) {
			pm_runtime_put_noidle(&client->dev);
			goto unlock_and_return;
		}

		imx291->power_on = true;
	} else {
		pm_runtime_put(&client->dev);
		imx291->power_on = false;
	}

unlock_and_return:
	mutex_unlock(&imx291->mutex);

	return ret;
}

/* Calculate the delay in us by clock rate and clock cycles */
static inline u32 imx291_cal_delay(u32 cycles)
{
	return DIV_ROUND_UP(cycles, IMX291_XVCLK_FREQ / 1000 / 1000);
}

static int __imx291_power_on(struct imx291 *imx291)
{
	int ret;
	u32 delay_us;
	struct device *dev = &imx291->client->dev;

	printk(KERN_CRIT "%s\n", __func__);
	if (imx291->is_thunderboot)
		return 0;

	if (!IS_ERR_OR_NULL(imx291->pins_default)) {
		ret = pinctrl_select_state(imx291->pinctrl,
					   imx291->pins_default);
		if (ret < 0)
			dev_err(dev, "could not set pins\n");
	}
	ret = clk_set_rate(imx291->xvclk, IMX291_XVCLK_FREQ);
	if (ret < 0)
		dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
	if (clk_get_rate(imx291->xvclk) != IMX291_XVCLK_FREQ)
		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
	ret = clk_prepare_enable(imx291->xvclk);
	if (ret < 0) {
		dev_err(dev, "Failed to enable xvclk\n");
		return ret;
	}

	ret = regulator_bulk_enable(IMX291_NUM_SUPPLIES, imx291->supplies);
	if (ret < 0) {
		dev_err(dev, "Failed to enable regulators\n");
		goto disable_clk;
	}

	if (!IS_ERR(imx291->reset_gpio))
		gpiod_direction_output(imx291->reset_gpio, 0);

	usleep_range(500, 1000);
	if (!IS_ERR(imx291->reset_gpio))
		gpiod_direction_output(imx291->reset_gpio, 1);


	/* 8192 cycles prior to first SCCB transaction */
	delay_us = imx291_cal_delay(8192);
	usleep_range(delay_us, delay_us * 2);

	printk(KERN_CRIT "%s end\n", __func__);
	return 0;

disable_clk:
	clk_disable_unprepare(imx291->xvclk);

	return ret;
}

static void __imx291_power_off(struct imx291 *imx291)
{
	int ret;
	struct device *dev = &imx291->client->dev;

	printk(KERN_CRIT "%s\n", __func__);
	if (imx291->is_thunderboot) {
			imx291->is_thunderboot = false;
	}

	clk_disable_unprepare(imx291->xvclk);

	if (!IS_ERR(imx291->reset_gpio))
		gpiod_direction_output(imx291->reset_gpio, 1);
	if (!IS_ERR_OR_NULL(imx291->pins_sleep)) {
		ret = pinctrl_select_state(imx291->pinctrl,
					   imx291->pins_sleep);
		if (ret < 0)
			dev_dbg(dev, "could not set pins\n");
	}

	if (imx291->is_thunderboot_ng) {
		imx291->is_thunderboot_ng = false;
	}
	printk(KERN_CRIT "%s end\n", __func__);
}

static int imx291_runtime_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	struct imx291 *imx291 = to_imx291(sd);

	return __imx291_power_on(imx291);
}

static int imx291_runtime_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	struct imx291 *imx291 = to_imx291(sd);

	__imx291_power_off(imx291);

	return 0;
}

#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
static int imx291_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
	struct imx291 *imx291 = to_imx291(sd);
	struct v4l2_mbus_framefmt *try_fmt =
				v4l2_subdev_get_try_format(sd, fh->pad, 0);
	const struct imx291_mode *def_mode = &supported_modes[0];

	mutex_lock(&imx291->mutex);
	/* Initialize try_fmt */
	try_fmt->width = def_mode->width;
	try_fmt->height = def_mode->height;
	try_fmt->code = def_mode->bus_fmt;
	try_fmt->field = V4L2_FIELD_NONE;

	mutex_unlock(&imx291->mutex);
	/* No crop or compose */

	return 0;
}
#endif

static int imx291_enum_frame_interval(struct v4l2_subdev *sd,
				       struct v4l2_subdev_pad_config *cfg,
				       struct v4l2_subdev_frame_interval_enum *fie)
{
	struct imx291 *imx291 = to_imx291(sd);

	if (fie->index >= imx291->cfg_num)
		return -EINVAL;

	fie->code = supported_modes[fie->index].bus_fmt;
	fie->width = supported_modes[fie->index].width;
	fie->height = supported_modes[fie->index].height;
	fie->interval = supported_modes[fie->index].max_fps;
	fie->reserved[0] = supported_modes[fie->index].hdr_mode;
	return 0;
}

static const struct dev_pm_ops imx291_pm_ops = {
	SET_RUNTIME_PM_OPS(imx291_runtime_suspend,
			   imx291_runtime_resume, NULL)
};

#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
static const struct v4l2_subdev_internal_ops imx291_internal_ops = {
	.open = imx291_open,
};
#endif

static const struct v4l2_subdev_core_ops imx291_core_ops = {
	.s_power = imx291_s_power,
	.ioctl = imx291_ioctl,
#ifdef CONFIG_COMPAT
	.compat_ioctl32 = imx291_compat_ioctl32,
#endif
};

static const struct v4l2_subdev_video_ops imx291_video_ops = {
	.s_stream = imx291_s_stream,
	.g_frame_interval = imx291_g_frame_interval,
	.g_mbus_config = imx291_g_mbus_config,
};

static const struct v4l2_subdev_pad_ops imx291_pad_ops = {
	.enum_mbus_code = imx291_enum_mbus_code,
	.enum_frame_size = imx291_enum_frame_sizes,
	.enum_frame_interval = imx291_enum_frame_interval,
	.get_fmt = imx291_get_fmt,
	.set_fmt = imx291_set_fmt,
};

static const struct v4l2_subdev_ops imx291_subdev_ops = {
	.core	= &imx291_core_ops,
	.video	= &imx291_video_ops,
	.pad	= &imx291_pad_ops,
};

static int imx291_set_ctrl(struct v4l2_ctrl *ctrl)
{
	struct imx291 *imx291 = container_of(ctrl->handler,
					     struct imx291, ctrl_handler);
	struct i2c_client *client = imx291->client;
	int ret = 0;

	/* Propagate change of current control to all related controls */
	switch (ctrl->id) {
	case V4L2_CID_VBLANK:
		break;
	}

	if (!pm_runtime_get_if_in_use(&client->dev))
		return 0;

	switch (ctrl->id) {
	case V4L2_CID_EXPOSURE:
		break;
	case V4L2_CID_ANALOGUE_GAIN:
		break;
	case V4L2_CID_VBLANK:
		break;
	case V4L2_CID_TEST_PATTERN:
		break;
	case V4L2_CID_HFLIP:
		break;
	case V4L2_CID_VFLIP:
		break;
	default:
		dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
			 __func__, ctrl->id, ctrl->val);
		break;
	}

	pm_runtime_put(&client->dev);

	return ret;
}

static const struct v4l2_ctrl_ops imx291_ctrl_ops = {
	.s_ctrl = imx291_set_ctrl,
};

static int imx291_initialize_controls(struct imx291 *imx291)
{
	const struct imx291_mode *mode;
	struct v4l2_ctrl_handler *handler;
	s64 exposure_max, vblank_def;
	u32 h_blank;
	int ret;

	handler = &imx291->ctrl_handler;
	mode = imx291->cur_mode;
	ret = v4l2_ctrl_handler_init(handler, 3);
	if (ret)
		return ret;
	handler->lock = &imx291->mutex;

	imx291->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
			V4L2_CID_LINK_FREQ,
			0, 0, link_freq_menu_items);

	/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
	imx291->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
			V4L2_CID_PIXEL_RATE,
			0, PIXEL_RATE_WITH_270M,
			1, PIXEL_RATE_WITH_270M);

	h_blank = mode->hts_def - mode->width;
	imx291->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
				h_blank, h_blank, 1, h_blank);
	if (imx291->hblank)
		imx291->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;

	vblank_def = mode->vts_def - mode->height;
	imx291->vblank = v4l2_ctrl_new_std(handler, &imx291_ctrl_ops,
				V4L2_CID_VBLANK, vblank_def,
				IMX291_VTS_MAX - mode->height,
				1, vblank_def);

	exposure_max = mode->vts_def - 4;
	imx291->exposure = v4l2_ctrl_new_std(handler, &imx291_ctrl_ops,
				V4L2_CID_EXPOSURE, IMX291_EXPOSURE_MIN,
				exposure_max, IMX291_EXPOSURE_STEP,
				mode->exp_def);

	imx291->anal_gain = v4l2_ctrl_new_std(handler, &imx291_ctrl_ops,
				V4L2_CID_ANALOGUE_GAIN, IMX291_GAIN_MIN,
				IMX291_GAIN_MAX, IMX291_GAIN_STEP,
				IMX291_GAIN_DEFAULT);

	imx291->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
				&imx291_ctrl_ops, V4L2_CID_TEST_PATTERN,
				ARRAY_SIZE(imx291_test_pattern_menu) - 1,
				0, 0, imx291_test_pattern_menu);

	imx291->h_flip = v4l2_ctrl_new_std(handler, &imx291_ctrl_ops,
				V4L2_CID_HFLIP, 0, 1, 1, 0);

	imx291->v_flip = v4l2_ctrl_new_std(handler, &imx291_ctrl_ops,
				V4L2_CID_VFLIP, 0, 1, 1, 0);
	imx291->flip = 0;
	imx291->subdev.ctrl_handler = handler;

	return 0;
}

static int imx291_configure_regulators(struct imx291 *imx291)
{
	unsigned int i;

	for (i = 0; i < IMX291_NUM_SUPPLIES; i++)
		imx291->supplies[i].supply = imx291_supply_names[i];

	return devm_regulator_bulk_get(&imx291->client->dev,
				       IMX291_NUM_SUPPLIES,
				       imx291->supplies);
}

static int imx291_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct device_node *node = dev->of_node;
	struct imx291 *imx291;
	struct v4l2_subdev *sd;
	char facing[2];
	int ret;
	u32 i, hdr_mode = 0;

	dev_info(dev, "driver version: %02x.%02x.%02x",
		DRIVER_VERSION >> 16,
		(DRIVER_VERSION & 0xff00) >> 8,
		DRIVER_VERSION & 0x00ff);

	imx291 = devm_kzalloc(dev, sizeof(*imx291), GFP_KERNEL);
	if (!imx291)
		return -ENOMEM;

	ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
				   &imx291->module_index);
	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
				       &imx291->module_facing);
	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
				       &imx291->module_name);
	ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
				       &imx291->len_name);
	if (ret) {
		dev_err(dev, "could not get module information!\n");
		return -EINVAL;
	}

	imx291->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
	ret = of_property_read_u32(node, OF_CAMERA_HDR_MODE,
			&hdr_mode);
	if (ret) {
		hdr_mode = NO_HDR;
		dev_warn(dev, " Get hdr mode failed! no hdr default\n");
	}
	imx291->cfg_num = ARRAY_SIZE(supported_modes);
	for (i = 0; i < imx291->cfg_num; i++) {
		if (hdr_mode == supported_modes[i].hdr_mode) {
			imx291->cur_mode = &supported_modes[i];
			break;
		}
	}
	imx291->client = client;

	imx291->xvclk = devm_clk_get(dev, "xvclk");
	if (IS_ERR(imx291->xvclk)) {
		dev_err(dev, "Failed to get xvclk\n");
		return -EINVAL;
	}

	ret = clk_set_rate(imx291->xvclk, IMX291_XVCLK_FREQ);
        if (ret < 0)
                dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
        if (clk_get_rate(imx291->xvclk) != IMX291_XVCLK_FREQ)
                dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
        ret = clk_prepare_enable(imx291->xvclk);
        if (ret < 0) {
                dev_err(dev, "Failed to enable xvclk\n");
                return ret;
        }

	imx291->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
	if (IS_ERR(imx291->reset_gpio)) {
		dev_warn(dev, "Failed to get reset-gpios\n");
	} else {
		gpiod_direction_output(imx291->reset_gpio, 1);
		gpiod_export(imx291->reset_gpio, true);
	}
	imx291->pinctrl = devm_pinctrl_get(dev);
	if (!IS_ERR(imx291->pinctrl)) {
		imx291->pins_default =
			pinctrl_lookup_state(imx291->pinctrl,
					     OF_CAMERA_PINCTRL_STATE_DEFAULT);
		if (IS_ERR(imx291->pins_default))
			dev_err(dev, "could not get default pinstate\n");

		imx291->pins_sleep =
			pinctrl_lookup_state(imx291->pinctrl,
					     OF_CAMERA_PINCTRL_STATE_SLEEP);
		if (IS_ERR(imx291->pins_sleep))
			dev_err(dev, "could not get sleep pinstate\n");
	} else {
		dev_err(dev, "no pinctrl\n");
	}

	ret = imx291_configure_regulators(imx291);
	if (ret) {
		dev_err(dev, "Failed to get power regulators\n");
		return ret;
	}

	mutex_init(&imx291->mutex);

	sd = &imx291->subdev;
	v4l2_i2c_subdev_init(sd, client, &imx291_subdev_ops);

	ret = imx291_initialize_controls(imx291);
	if (ret)
		goto err_probe;

#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
	sd->internal_ops = &imx291_internal_ops;
	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
#endif
#if defined(CONFIG_MEDIA_CONTROLLER)
	imx291->pad.flags = MEDIA_PAD_FL_SOURCE;
	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
	ret = media_entity_pads_init(&sd->entity, 1, &imx291->pad);
	if (ret < 0)
		goto err_power_off;
#endif

	memset(facing, 0, sizeof(facing));
	if (strcmp(imx291->module_facing, "back") == 0)
		facing[0] = 'b';
	else
		facing[0] = 'f';

	snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
		 imx291->module_index, facing,
		 IMX291_NAME, dev_name(sd->dev));
	ret = v4l2_async_register_subdev_sensor_common(sd);
	if (ret) {
		dev_err(dev, "v4l2 async register subdev failed\n");
		goto err_clean_entity;
	}

	pm_runtime_set_active(dev);
	pm_runtime_enable(dev);
	//pm_runtime_idle(dev);

	printk(KERN_CRIT "%s end!\n", __func__);
	return 0;

err_clean_entity:
#if defined(CONFIG_MEDIA_CONTROLLER)
	media_entity_cleanup(&sd->entity);
#endif
err_power_off:
	__imx291_power_off(imx291);
err_probe:
	mutex_destroy(&imx291->mutex);

	return ret;
}

static int imx291_remove(struct i2c_client *client)
{
	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	struct imx291 *imx291 = to_imx291(sd);

	v4l2_async_unregister_subdev(sd);
#if defined(CONFIG_MEDIA_CONTROLLER)
	media_entity_cleanup(&sd->entity);
#endif
	mutex_destroy(&imx291->mutex);

	pm_runtime_disable(&client->dev);
	if (!pm_runtime_status_suspended(&client->dev))
		__imx291_power_off(imx291);
	pm_runtime_set_suspended(&client->dev);

	return 0;
}

#if IS_ENABLED(CONFIG_OF)
static const struct of_device_id imx291_of_match[] = {
	{ .compatible = "sony,imx291" },
	{},
};
MODULE_DEVICE_TABLE(of, imx291_of_match);
#endif

static const struct i2c_device_id imx291_match_id[] = {
	{ "sony,imx291", 0 },
	{ },
};

static struct i2c_driver imx291_i2c_driver = {
	.driver = {
		.name = IMX291_NAME,
		.pm = &imx291_pm_ops,
		.of_match_table = of_match_ptr(imx291_of_match),
	},
	.probe		= &imx291_probe,
	.remove		= &imx291_remove,
	.id_table	= imx291_match_id,
};

#ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
module_i2c_driver(imx291_i2c_driver);
#else
static int __init sensor_mod_init(void)
{
	return i2c_add_driver(&imx291_i2c_driver);
}

static void __exit sensor_mod_exit(void)
{
	i2c_del_driver(&imx291_i2c_driver);
}

device_initcall_sync(sensor_mod_init);
module_exit(sensor_mod_exit);
#endif

MODULE_DESCRIPTION("xxxx imx291 sensor driver");
MODULE_LICENSE("GPL v2");
